Why Current Mode TX Driver in a SerDes?
12:53
Why Half-Rate Clocking SerDes?
13:35
Why Half-Rate or Quarter-Rate Clocking Serializer TX?
13:49
Why Full-Rate RX DFE?
20:05
Why Artificial ISI for DFE Design & Verification?
13:01
Why Single Pulse Response or Single Shot for ISI Analysis?
18:36
Why Full-Rate CDR?
17:11
Why Half-Rate or Quarter-Rate CDR?
13:17