Why Half-Rate Clocking SerDes?
13:35
Why Half-Rate or Quarter-Rate Clocking Serializer TX?
11:57
Why TX Driver in a SerDes?
12:21
SERDES Clocking and Equalization for High-Speed Serial Links, Jack Kenney
12:20
Why Ethernet?
26:11
深入剖析CTLE+DFE均衡，给信号“补血”，让眼图"开眼"
20:05
Why Artificial ISI for DFE Design & Verification?
17:11
Why Half-Rate or Quarter-Rate CDR?
15:07