DVD - Lecture 2: Verilog
![](https://i.ytimg.com/vi/4BZ6t2d3rJM/mqdefault.jpg)
1:16:27
DVD - Lecture 3: Logic Synthesis - Part 1
![](https://i.ytimg.com/vi/2IReMT_zjK8/mqdefault.jpg)
14:50
The best way to start learning Verilog
![](https://i.ytimg.com/vi/lTt2LN7nub0/mqdefault.jpg)
1:20:22
DVD - Lecture 4: Logic Synthesis - Part II
![](https://i.ytimg.com/vi/FUCXqpmdAFA/mqdefault.jpg)
1:05:09
DVD - Lecture 6: Moving to the Physical Domain
![](https://i.ytimg.com/vi/bOE7E-DOdMQ/mqdefault.jpg)
1:03:37
Sade - Ultimate
![](https://i.ytimg.com/vi/hgzuxRc7n6M/mqdefault.jpg)
29:29
DVD - Lecture 2b: Verilog Syntax
![](https://i.ytimg.com/vi/xx7ymxmqrgU/mqdefault.jpg)
1:20:44
DVD - Lecture 8: Clock Tree Synthesis
![](https://i.ytimg.com/vi/0q9WIfzpHHY/mqdefault.jpg)
1:33:01