Digital Design & Comp. Arch. - Lecture 7b: HW Description Lang. & Verilog (ETH Zürich, Spring 2020)
1:31:24
Digital Design & Computer Architecture - Lecture 8: Timing & Verification (ETH Zürich, Spring 2020)
1:29:48
Digital Design & Comp. Arch. - Lecture 9: Von Neumann Model ISA LC3 MIPS (ETH Zürich, Spring 2020)
1:19:26
Alessio Figalli: “The beauty of nature and the art of problem-solving”
1:32:43
Digital Design & Comp. Arch. - Lecture 15b: OoO, DataFlow & LD/ST Handling (ETH Zürich, Spring 2020)
1:32:52
Digital Design & Computer Arch. - Lecture 6: Sequential Logic Design (ETH Zürich, Spring 2021)
1:28:22
Digital Design & Computer Architecture - Lecture 13: Pipelining (ETH Zürich, Spring 2020)
57:24
Professor Avi Wigderson on the "P vs. NP" problem
1:10:34