VLSI Physical Design: Routing
10:48
PD Lec 67 - Global and Detail Routing | VLSI | Physical Design
11:08
Routing | Physical Design | Back To Basics
35:39
Global Routing (Part 1)
50:07
VLSI | Fixes in Physical Design | Max/Min Delay | Max tran/cap | Crosstalk | IR drop | EM | Antenna
19:04
VLSI Physical Design: Clock Tree Synthesis (CTS)
44:20
Left Edge and Dogleg Algorithm for channel routing
5:42
PD Lec 38 - Global Route Congestion | VLSI | Physical Design
52:26