1:52:36

AXI Memory Mapped Interfaces & Hardware Debugging in Vivado (Lesson 5)

27:23

Creating your first FPGA design in Vivado

31:29

Introduction to Direct Memory Access (DMA)

1:10:49

ZYNQ Training - Session 04 - Designing with AXI using Xilinx Vivado

18:56

The AXI Protocol, AXI MM and AXI Streaming Interfaces [English]

16:28

DMA basic example

24:52

What if all the world's biggest problems have the same solution?

1:11:12

Developing application software for Xilinx AXI DMA