Signal Integrity Issues in VLSI | Crosstalk, Glitch | How to avoid these issues?
8:31
Clock Reconvergence Pessimism Removal (CRPR) | STA
33:33
Crosstalk issue in VLSI | Signal Integrity | crosstalk glitch | crosstalk Noise | part-1
13:31
Clock Skew and Clock Jitter
12:25
Electromigration and Reliability in VLSI | Why do chips die?
12:25
Buffer and Inverter insertion in Timing paths | Inverters vs Buffers | Buffer as a repeater
7:58
Power Integrity and IR drop | Techniques to reduce IR drop
7:09
Temperature Inversion | Physical Design
9:50