What is AXI (Part 1)
6:49
What is AXI: Read Bursts (Part 2)
12:11
AXI Stream basics for beginners! A Stream FIFO example in Verilog.
41:35
PCIe Architecture: Lecture-1
9:50
What is AXI Lite?
18:56
The AXI Protocol, AXI MM and AXI Streaming Interfaces [English]
11:50
Understanding SPI
1:52:36
AXI Memory Mapped Interfaces & Hardware Debugging in Vivado (Lesson 5)
1:00:01