What are Tie Cells | Physical Design
![](https://i.ytimg.com/vi/7NctVo0BL3s/mqdefault.jpg)
6:14
What are Decap Cells | Physical Design
![](https://i.ytimg.com/vi/lj8vUxlrUsE/mqdefault.jpg)
17:04
Tie Cell in ASIC Design | Use of Tie cell | Schematic and Layout of Tie cells | How Tie cells work
![](https://i.ytimg.com/vi/MZiyk80X_0Y/mqdefault.jpg)
5:20
What are Well Tap Cells | Physical Design
![](https://i.ytimg.com/vi/O6HzFuOXvIg/mqdefault.jpg)
12:33
Power Gating and Mother/Daughter cells in VLSI
![](https://i.ytimg.com/vi/NRdm9bElcqY/mqdefault.jpg)
10:09
What is Decoupling Capacitors?? Learn @ Udemy- VLSI Academy
![](https://i.ytimg.com/vi/ZmQSJAXLFZQ/mqdefault.jpg)
5:43
PD Lec 41 - Tie Cell | tie low| tie high | VLSI | Physical Design
![](https://i.ytimg.com/vi/pkQRd7DqJfA/mqdefault.jpg)
6:08
LATCH-UP IN CMOS CIRCUITS
![](https://i.ytimg.com/vi/E6Xg-waCDzY/mqdefault.jpg)
26:28