VLSI | Fixes in Physical Design | Max/Min Delay | Max tran/cap | Crosstalk | IR drop | EM | Antenna
16:53
VLSI | Crosstalk Analysis in Physical Design | Crosstalk Noise | Crosstalk Delay | Fixing Crosstalk
13:00
Antenna Effects | Physical Verification | Back To Basics
52:26
Place and Route in Cadence Innovus | full PnR flow | Cadence Innovus demo I Innovus Tutorial
18:08
VLSI Physical Design: Powerplan
21:25
IR Drop issue in VLSI | What is IR drop in ASIC | Why IR Drop | Effects of IR Drop
8:41
Writing UPF for a given power intent
21:09
POCV | Parametric On-Chip Variation | Static Timing Analysis | VLSI
19:06