design a 4 bit adder program using verilog hdl and implement it using basys 3
15:07
design ripple carry adder using block design
21:20
Design and simulate SR and T flipflop using HDL
15:32
Design and simulate Moore finite state machine using verilog HDL
17:00
Design of a half adder using verilog HDL and implement it using Basys 3 board
15:27
Design and simulate universal shift register using HDL
25:27
built in self test
29:22
implementation of Schmitt trigger circuit using mosfet
10:40