125N. Two transistor stages: cascade, folded cascade, active load, Darlington, current mirror
![](https://i.ytimg.com/vi/_MXrgcelKMM/mqdefault.jpg)
38:20
126N. Differential Signaling and differential pair: core concept and large signal behavior (BJT)
![](https://i.ytimg.com/vi/Nebz-5-8i6I/mqdefault.jpg)
1:15:18
123N. (Pt. 1) MOS amplifier stages: Source degeneration, input and output impedances
![](https://i.ytimg.com/vi/OFOgNsqet8Y/mqdefault.jpg)
1:13:16
137N. MOS Op-Amp Design Examples
![](https://i.ytimg.com/vi/c-eKgWp657s/mqdefault.jpg)
1:10:18
132N. Integrated circuit biasing, current mirrors, headroom
![](https://i.ytimg.com/vi/SHNtb3f60zA/mqdefault.jpg)
53:06
122N. (Pt. 2) BJT Amplifier, Emitter follower, common-based, cascode, active load, maximum gain
![](https://i.ytimg.com/vi/UjrAsJcmblY/mqdefault.jpg)
14:11
Feynman at Caltech - John Preskill and Kip Thorne - 5/11/2018
![](https://i.ytimg.com/vi/BG_Ny9Prx5s/mqdefault.jpg)
1:03:07
127N. (Pt. 1) Differential Amplifiers: MOS, BJT, and ATD
![](https://i.ytimg.com/vi/pp06oGD4m00/mqdefault.jpg)
59:24